Data read-write circuit based on ONFI protocol and flash memory read-write controller

The invention relates to the technical field of flash memory data read-write, and discloses a data read-write circuit based on an ONFI protocol and a flash memory read-write controller, the write circuit comprises an ONFI interface, a DQS signal generation circuit, a write data delay lock loop and a clock gating unit, the write data delay locked loop is used for performing preset phase delay on an initial clock signal input by the controller so as to output a delayed clock signal; the clock gating unit is used for intercepting the delayed clock signal to generate a DQS signal conforming to an ONFI time sequence; and the data delay output circuit is used for receiving to-be-written data with a preset bit number input by the controller, performing phase shift on the to-be-written data, and sequentially writing the to-be-written data into external memories connected with the ONFI interface under a DQS signal time sequence. A circuit structure that a single clock sends DQS and DQ signals is provided, and a freque