Silicon carbide wafer and silicon carbide semiconductor device using same

The invention provides a silicon carbide wafer and a silicon carbide semiconductor device using the same. This silicon carbide wafer is provided with a substrate (10) comprising SiC, and an epitaxial layer (20) comprising SiC and disposed on the substrate, and has a chip formation region in which a...

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1. Verfasser: UEHIGASHI HIDEYUKI
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The invention provides a silicon carbide wafer and a silicon carbide semiconductor device using the same. This silicon carbide wafer is provided with a substrate (10) comprising SiC, and an epitaxial layer (20) comprising SiC and disposed on the substrate, and has a chip formation region in which a semiconductor element is formed, and an outer peripheral region surrounding the chip formation region. The epitaxial layer has a trap density of 1.0 * 1013 cm or less at an activation energy of 0.10-0.20 eV derived by a DLTS method in the chip formation region, and the substrate has a Ti density and a Cr density of 1.0 * 1017 cm or less as measured by an SIMS method. 一种碳化硅晶片以及使用了该碳化硅晶片的碳化硅半导体装置。碳化硅晶片具备由SiC构成的基板(10)、以及由SiC构成并配置于基板上的外延层(20),并具有形成半导体元件的芯片形成区域、以及包围芯片形成区域的外周区域。外延层在芯片形成区域中通过DLTS法导出的0.10~0.20eV的活化能中的陷阱密度设为1.0×1013cm-3以下,基板通过SIMS法测定的Ti密度以及Cr密度分别设为1.0×1017cm-3以下。