Control method and control device of double-rate synchronous dynamic random access memory

The invention provides a control method and a control device for a double-rate synchronous dynamic random access memory, and belongs to the technical field of integrated circuits. The method comprises the steps that the FPGA determines the data storage state of the DDR, wherein the data storage state is used for indicating whether the DDR stores data or not; in response to the data storage state indicating that the data is stored in the DDR, the data with the target length is read from a first readable storage area in the multiple first storage areas in turn until no data exists in the DDR, and the first readable storage area is the first storage area in which the data is stored. According to the method, the efficiency of reading the data from the DDR by the FPGA can be improved. 本公开提供了一种双倍速率同步动态随机存储器的控制方法和控制装置，属于集成电路技术领域。该方法包括：FPGA确定DDR的数据存储状态，数据存储状态用于指示DDR是否存储有数据；响应于数据存储状态指示DDR中存储有数据，轮流从多个第一存储区中的第一可读存储区中读取目标长度的数据，直至DDR中不存在数据，第一可读存储区为存储有数据的第一存储区。该方法能够提高FPGA从DDR中读取数据的效率。