SEMICONDUCTOR PACKAGE
A semiconductor package is provided. The semiconductor package includes a lower chip. A chip stack structure is disposed on the lower chip. The chip stacking structure comprises a plurality of upper chips. An underfill layer is disposed between the lower chip and the chip stack structure and between...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A semiconductor package is provided. The semiconductor package includes a lower chip. A chip stack structure is disposed on the lower chip. The chip stacking structure comprises a plurality of upper chips. An underfill layer is disposed between the lower chip and the chip stack structure and between the plurality of upper chips. The molding layer surrounds the underfill layer and the chip stack structure. The lower chip has at least one lower trench on an upper surface of the lower chip. At least one upper chip of the plurality of upper chips has at least one upper trench on an upper surface of the at least one upper chip of the plurality of upper chips.
提供了一种半导体封装件。所述半导体封装件包括下芯片。芯片堆叠结构布置在下芯片上。芯片堆叠结构包括多个上芯片。底部填充层设置在下芯片与芯片堆叠结构之间以及所述多个上芯片之间。模塑层围绕底部填充层和芯片堆叠结构。下芯片具有位于下芯片的上表面上的至少一个下沟槽。所述多个上芯片中的至少一个上芯片在所述多个上芯片中的所述至少一个上芯片的上表面上具有至少一个上沟槽。 |
---|