Layer bias short circuit test method, device, equipment and storage medium

The invention discloses a layer deviation short circuit test method, device and equipment and a storage medium, and the method comprises the steps: building a coordinate system through a CCD camera by recognizing a preset positioning hole in a primary drilling stage of a PCB manufacturing process, carrying out the positioning through the coordinates of the coordinate system and a preset drilling point position, obtaining a drilling point position, and carrying out the positioning of the drilling point position; the method comprises the following steps: in a primary drilling stage of a PCB manufacturing process, drilling according to preset manufacturing via hole parameters and a drilling point location to obtain a test hole, manufacturing a bonding pad on the outer layer of a tested board according to preset bonding pad parameters and the position of the test hole to obtain a target bonding pad, and performing a layer offset short circuit test on the target bonding pad to obtain a target test result. Accordin