PROCESSOR AND CONTROL SYSTEM INCLUDING THE SAME

A notification CPU (144) is provided with a first memory (210), a first core (220), and a second core (230). The first core (220) executes: a predetermined arithmetic process; a process for reading out a setting parameter corresponding to a predetermined communication standard from a second memory (...

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Hauptverfasser: KINUGASA YASUHIRO, AIMI KEI
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:A notification CPU (144) is provided with a first memory (210), a first core (220), and a second core (230). The first core (220) executes: a predetermined arithmetic process; a process for reading out a setting parameter corresponding to a predetermined communication standard from a second memory (148) that stores the setting parameter corresponding to the predetermined communication standard and writing the setting parameter to the first memory (210); a process for reading input information from the first memory (210); and a process for writing, as output information, the information obtained by the calculation process to the first memory (210). The second core (230) executes: a read-out process for reading out the setting parameters from the first memory (210); a communication process with the outside using the setting parameter read out in the read-out process; a process for writing information received in the communication process into a first memory (210) as input information; and a process for reading