Packaging method and packaging structure of integrated chip

The invention discloses a packaging method and a packaging structure of an integrated chip, and relates to the technical field of packaging, and the packaging method comprises the following steps: a dielectric layer is formed on the front surface of a device wafer, a first chip is formed in the device wafer, the first chip is provided with a first bonding pad, and the dielectric layer exposes the first bonding pad; forming a bonding layer on the dielectric layer on the surface of the first chip; forming an opening in the adhesive layer; forming a conductive bump on the first pad; the second chip is provided with a second bonding pad, the second bonding pad is connected with the conductive bump, the second chip is bonded with the bonding layer, and the second chip seals the opening to form a cavity; forming a packaging layer on the front surface of the device wafer to cover the second chip; a conduction structure is formed in the device wafer, one end of the conduction structure is connected with the first chi