METHOD AND CIRCUIT ASSEMBLY FOR DETERMINING A CUTTOFF LAYER TEMPERATURE OF A SEMICONDUCTOR
The invention relates to a method and a circuit arrangement for determining a cut-off layer temperature of a semiconductor structure element having an insulated gate. The invention relates to a method for determining a cutoff layer temperature of a semiconductor component, comprising the following s...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a method and a circuit arrangement for determining a cut-off layer temperature of a semiconductor structure element having an insulated gate. The invention relates to a method for determining a cutoff layer temperature of a semiconductor component, comprising the following steps: actuating a gate of the semiconductor component by means of a current-conducting gate driver at a first switching-on phase time (TE1) by means of a predefined switching-on current (IE1) in order to initiate a switching-on process of the semiconductor component, a first switch-on phase time measurement is started at the first switch-on phase time (TE1), and a second switch-on phase time (TE2) is determined on the basis of the detection of a rising current edge in the load path of the semiconductor component, said second switch-on phase time representing the reaching of a threshold voltage (VGS) of the semiconductor component, and ascertaining a current cut-off layer temperature of the semiconductor structure e |
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