Method for improving bandwidth utilization rate in convolution calculation process

The invention belongs to the field of neural network hardware architecture design, and particularly discloses a method for improving the bandwidth utilization rate in the convolution calculation process. According to the invention, the convolution calculation can be performed on the feature data in the feature map in the two-stage control unit through the two-stage control unit and the address generation unit, and the feature data can be further read from the SPM according to the address generated by the corresponding address generation unit, so that the corresponding feature data can be transmitted to the local cache. According to the method provided by the invention, the feature data of two points can be processed in parallel at one time, and when the feature data of multiple points are stored in one row of the SPM, the feature data of multiple points can be processed in parallel, so that the bandwidth utilization rate of data access in the convolution calculation process is effectively improved, and the co