Memory test equipment and parallel test method of multiple tested equipment

The invention provides a memory testing device and a parallel testing method of a plurality of devices under test, and the memory testing device uses a master control unit to simultaneously operate a plurality of slave control units (SCUs). The SCU has one or more processing units (i.e., a finite-st...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	MIKE HOSSEIN AMIDI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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