Memory test equipment and parallel test method of multiple tested equipment

The invention provides a memory testing device and a parallel testing method of a plurality of devices under test, and the memory testing device uses a master control unit to simultaneously operate a plurality of slave control units (SCUs). The SCU has one or more processing units (i.e., a finite-st...

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Bibliographische Detailangaben
1. Verfasser: MIKE HOSSEIN AMIDI
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The invention provides a memory testing device and a parallel testing method of a plurality of devices under test, and the memory testing device uses a master control unit to simultaneously operate a plurality of slave control units (SCUs). The SCU has one or more processing units (i.e., a finite-state machine, a microcontroller, a processor) capable of processing one or more firmware (i.e., a bare computer, an embedded operating system, a real-time operating system, RTOS) with or without an operating system to execute a series of tasks defined by the firmware, the SCU is configured to test volatile and/or non-volatile memory devices connected to one or more DUT devices, and the SCU can have an operating system and locally install and run host applications within each SCU unit to simulate a host application environment while performing conventional memory tests. 提供了一种存储器测试设备和多个被测设备的并行测试方法,该存储器测试设备使用主控制单元同时操作多个智能从属控制单元(slave control units,SCU)。SCU具有一个或更多个处理单元(即,有限状态机、微控制器、处理器),处理单元能够处理一个或更多个带有或不带有操作系统的固件(即,裸机、