System and method for computing acceleration
Systems and methods for compute acceleration are described. The system may include a host processor; a host memory connected to the host processor; and a storage device connected to the host processor. The accelerator may be in communication with the host processor. The accelerator may generate an o...
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| creator | KI YANG SEOK LI ZONGWANG NGUYEN MARY MAI PITCHUMANI, REKA |
| description | Systems and methods for compute acceleration are described. The system may include a host processor; a host memory connected to the host processor; and a storage device connected to the host processor. The accelerator may be in communication with the host processor. The accelerator may generate an output. The accelerator may also include a local memory, which may include a first region and a second region. A first region of a local memory of the accelerator may support a first mode, and a second region of the local memory of the accelerator may support a second mode. The accelerator may store the output of the accelerator in a destination, which may include a host memory, a storage device, a first region of a local memory of the accelerator, or a second region of the local memory of the accelerator.
描述了用于计算加速的系统和方法。所述系统可包括：主机处理器；主机存储器，连接到主机处理器；以及存储装置，连接到主机处理器。加速器可与主机处理器通信。加速器可产生输出。加速器也可包括本地存储器，本地存储器可包括第一区域和第二区域。加速器的本地存储器的第一区域可支持第一模式，并且加速器的本地存储器的第二区域可支持第二模式。加速器可将加速器的所述输出存储在目的地中，所述目的地可包括主机存储器、存储装置、加速器的本地存储器的第一区 |
| format | Patent |
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描述了用于计算加速的系统和方法。所述系统可包括：主机处理器；主机存储器，连接到主机处理器；以及存储装置，连接到主机处理器。加速器可与主机处理器通信。加速器可产生输出。加速器也可包括本地存储器，本地存储器可包括第一区域和第二区域。加速器的本地存储器的第一区域可支持第一模式，并且加速器的本地存储器的第二区域可支持第二模式。加速器可将加速器的所述输出存储在目的地中，所述目的地可包括主机存储器、存储装置、加速器的本地存储器的第一区</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240507&DB=EPODOC&CC=CN&NR=117992362A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240507&DB=EPODOC&CC=CN&NR=117992362A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KI YANG SEOK</creatorcontrib><creatorcontrib>LI ZONGWANG</creatorcontrib><creatorcontrib>NGUYEN MARY MAI</creatorcontrib><creatorcontrib>PITCHUMANI, REKA</creatorcontrib><title>System and method for computing acceleration</title><description>Systems and methods for compute acceleration are described. The system may include a host processor; a host memory connected to the host processor; and a storage device connected to the host processor. The accelerator may be in communication with the host processor. The accelerator may generate an output. The accelerator may also include a local memory, which may include a first region and a second region. A first region of a local memory of the accelerator may support a first mode, and a second region of the local memory of the accelerator may support a second mode. The accelerator may store the output of the accelerator in a destination, which may include a host memory, a storage device, a first region of a local memory of the accelerator, or a second region of the local memory of the accelerator.
描述了用于计算加速的系统和方法。所述系统可包括：主机处理器；主机存储器，连接到主机处理器；以及存储装置，连接到主机处理器。加速器可与主机处理器通信。加速器可产生输出。加速器也可包括本地存储器，本地存储器可包括第一区域和第二区域。加速器的本地存储器的第一区域可支持第一模式，并且加速器的本地存储器的第二区域可支持第二模式。加速器可将加速器的所述输出存储在目的地中，所述目的地可包括主机存储器、存储装置、加速器的本地存储器的第一区</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAJriwuSc1VSMxLUchNLcnIT1FIyy9SSM7PLSgtycxLV0hMTk7NSS1KLMnMz-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaG5paWRsZmRo7GxKgBAKNPKgM</recordid><startdate>20240507</startdate><enddate>20240507</enddate><creator>KI YANG SEOK</creator><creator>LI ZONGWANG</creator><creator>NGUYEN MARY MAI</creator><creator>PITCHUMANI, REKA</creator><scope>EVB</scope></search><sort><creationdate>20240507</creationdate><title>System and method for computing acceleration</title><author>KI YANG SEOK ; LI ZONGWANG ; NGUYEN MARY MAI ; PITCHUMANI, REKA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117992362A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>KI YANG SEOK</creatorcontrib><creatorcontrib>LI ZONGWANG</creatorcontrib><creatorcontrib>NGUYEN MARY MAI</creatorcontrib><creatorcontrib>PITCHUMANI, REKA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KI YANG SEOK</au><au>LI ZONGWANG</au><au>NGUYEN MARY MAI</au><au>PITCHUMANI, REKA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and method for computing acceleration</title><date>2024-05-07</date><risdate>2024</risdate><abstract>Systems and methods for compute acceleration are described. The system may include a host processor; a host memory connected to the host processor; and a storage device connected to the host processor. The accelerator may be in communication with the host processor. The accelerator may generate an output. The accelerator may also include a local memory, which may include a first region and a second region. A first region of a local memory of the accelerator may support a first mode, and a second region of the local memory of the accelerator may support a second mode. The accelerator may store the output of the accelerator in a destination, which may include a host memory, a storage device, a first region of a local memory of the accelerator, or a second region of the local memory of the accelerator.
描述了用于计算加速的系统和方法。所述系统可包括：主机处理器；主机存储器，连接到主机处理器；以及存储装置，连接到主机处理器。加速器可与主机处理器通信。加速器可产生输出。加速器也可包括本地存储器，本地存储器可包括第一区域和第二区域。加速器的本地存储器的第一区域可支持第一模式，并且加速器的本地存储器的第二区域可支持第二模式。加速器可将加速器的所述输出存储在目的地中，所述目的地可包括主机存储器、存储装置、加速器的本地存储器的第一区</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | System and method for computing acceleration |
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