Sampling adjustment method and system and programmable logic circuit

The invention discloses a sampling adjustment method and system and a programmable logic circuit, and the method comprises the steps: obtaining a target data signal, the target data signal comprises a plurality of numerical values distributed on a time axis, each numerical value corresponds to a steady-state interval, and two adjacent different numerical values correspond to metastable-state intervals; acquiring a sampling clock signal; and performing delay adjustment on a specified signal based on a sampling moment and the metastable-state interval of the target data signal, so that the sampling clock signal samples the stable-state interval of the target data signal at the sampling moment. According to the method and the device, the sampling clock signal can sample the steady-state interval of the target data signal at the sampling moment by adjusting the specified signal, manual adjustment is not needed, the adjustment efficiency is improved, and the method and the device have a relatively large adjustment