Static random access memory and layout pattern thereof

The invention provides a static random access memory and a layout pattern thereof, and the layout pattern of the static random access memory comprises a plurality of fin-shaped structures located on a substrate, a plurality of gate structures located on the substrate and spanning the plurality of fin-shaped structures to form a plurality of transistors distributed on the substrate, and a plurality of gate structures located on the substrate and spanning the plurality of fin-shaped structures. Wherein the plurality of transistors comprise a first pull-up transistor (PU1), a first pull-down transistor (PD1), a second pull-up transistor (PU2), a second pull-down transistor (PD2), a first access transistor (PG1), a second access transistor (PG2), a first read transistor (RPD) and a second read transistor (RPG), wherein a gate structure included in the first read transistor (RPD) is connected to a gate structure of the first pull-down transistor (PD1), a drain of the first pull-down transistor (PD1) is connected t