Apparatus, system and method for data timing alignment in fast alignment mode

The disclosure relates to devices, systems, and methods for data timing alignment in a fast alignment mode. The stacked memory device includes an interface die and a plurality of core dies. The interface and the core die each have an adjustable delay circuit adjusted by an interface delay code or a respective core delay code. The delay code is adjusted based on a measured phase difference along a copy path. In a default maintenance state, the delay code may be adjusted over time based on an average value of the phase difference. The interface die changes a count value associated with that core die whenever the phase difference matches a previous phase difference. If one or more of the count values exceed a threshold, a state machine of the interface die enters a different delay adjustment state in which averaging is not used. This may allow for systematic errors, such as voltage drift, to be corrected. 本公开涉及用于以快速对准模式进行数据时序对准的设备、系统及方法。堆叠式存储器装置包含接口裸片及数个核心裸片。所述接口及所述核心裸片各自具有由接口延迟码或相应核心延迟码调整的可调整延迟电路。所述延迟码基于沿着复制路径的