Voltage regulator circuit

The present disclosure relates to a voltage regulation circuit formed inside and on top of a monolithic semiconductor substrate having a surface covered with a gallium nitride layer, comprising: a first resistor and a first d-mode HEMT transistor between a first terminal and a second terminal; and a second d-mode HEMT transistor between the first terminal and the third terminal; wherein a midpoint between the first resistor and the first transistor is coupled to gates of the first transistor and the second transistor. 本公开涉及一种电压调节电路，电压调节电路被形成在表面覆盖有氮化镓层的单片半导体衬底的内部和顶部，包括：第一端子与第二端子之间的第一电阻器和第一d模式型HEMT晶体管；以及第一端子与第三端子之间的第二d模式型HEMT晶体管；其中第一电阻器与第一晶体管之间的中点被耦合至第一晶体管和第二晶体管的栅极。