Chip testing method, register, electronic equipment and storage medium

The invention provides a chip testing method, a register, electronic equipment and a storage medium, and relates to the technical field of chip testing. The method comprises the following steps: acquiring an externally loaded test vector in a scanning mode; under the action of the test vectors, duration delay and pulse processing are carried out on the multiple original clock signals respectively, multiple clock pulse signals are obtained, and the clock pulse signals have preset delay duration and are represented in the form of pulse signals; there is no interaction path among a plurality of clock pulse signals, and orderly transmission of logic data carried by the clock pulse signals can be realized; in the shifting mode, the clock pulse signal is output to the outside of the chip based on the effect of the shifting signal, and the clock pulse signal is used for testing the data processing function of the chip. The number of test vectors is reduced, the test efficiency is improved, no interaction path exists