BONDED VERTICAL SEMICONDUCTOR DEVICE

A vertical semiconductor device includes: a pattern structure including a plurality of insulating patterns and a plurality of gate electrodes alternately and repeatedly stacked on a substrate, in which the pattern structure includes a first gate electrode serving as a gate electrode of an erase transistor, in which the first gate electrode is one of the plurality of gate electrodes; and a channel structure in a channel hole passing through the pattern structure, where the channel structure includes a data storage structure, a first channel, an undoped semiconductor pad, a doped semiconductor pattern, a filling insulating pattern, and a capping pattern, wherein the data storage structure, the first channel, the undoped semiconductor pad, and the doped semiconductor pattern are sequentially disposed on sidewalls of the first gate electrode. 一种垂直半导体器件，包括：图案结构，包括交替且重复堆叠在衬底上的多个绝缘图案和多个栅电极，其中图案结构包括用作擦除晶体管的栅电极的第一栅电极，其中第一栅电极是多个栅电极中的一个；以及在穿过图案结构的沟道孔中的沟道结构，其中沟道结构包括数据存储结构、第一沟道、未掺杂半导体衬垫、掺杂半导体图案、填充绝缘图案和覆盖图案，其中数据存储结构、第一沟道、未