Multi-project wafer layout splicing method and device based on adaptive search and storage medium

The invention discloses a splicing method of a multi-project wafer layout. The splicing method comprises the steps that S1, chip specification parameters and constraint parameters of an envelope rectangle formed after splicing are obtained; s2, sorting a plurality of to-be-spliced polygonal chips according to an area sequence from large to small, sequentially placing the polygonal chips in a preset splicing area, and calculating the area of an envelope rectangle after all the polygonal chips corresponding to the initial width are placed; s3, calculating the area of each envelope rectangle corresponding to each of the rest widths; s4, obtaining a set of the areas of the enveloping rectangles sorted according to an area decreasing sequence; s5, setting the selected probability of the kth enveloping rectangle corresponding to the area of the kth enveloping rectangle in the set of the areas of the enveloping rectangles as P, and selecting one enveloping rectangle according to the probability; and S6, rotating at