FPGA program upgrading method

The invention relates to an FPGA program upgrading method, and the method comprises the steps: obtaining the state information of an FPGA, and the state information comprises the states of an erasing signal, a programming signal and a read-back signal; under the condition that the states of the erasing signal, the programming signal and the read-back signal are all idle, an erasing instruction is sent to the FPGA; in response to completion of execution of the erasing instruction, sending a programming instruction to the FPGA, and transmitting the to-be-upgraded program file to a cache of the FPGA; sending the total length of the program file to the FPGA; in response to completion of programming of the program file, sending a read-back instruction to the FPGA; in response to the first code sum sent by the FPGA, verifying the programmed program file according to the first code sum and the second code sum; and under the condition that the verification is passed, determining that the upgrading of the program file