Conductive pvd stack-up design for improved reliability of deposited electrodes
The invention relates to a conductive PVD stack-up design for improving the reliability of deposited electrodes. An electronic device may include a housing component that may define an inner surface and an outer surface of the device; a first film deposited on the inner surface and extending at leas...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a conductive PVD stack-up design for improving the reliability of deposited electrodes. An electronic device may include a housing component that may define an inner surface and an outer surface of the device; a first film deposited on the inner surface and extending at least partially around an edge of the housing component onto the outer surface; and a second film deposited on the outer surface and at least partially deposited on a portion of the first film on the outer surface, the second film in electrical communication with a portion of the first film deposited on the inner surface.
本公开涉及用于改善沉积电极的可靠性的导电PVD层叠设计。一种电子设备,所述电子设备可包括:外壳部件,所述外壳部件可限定所述设备的内表面和外表面;第一膜,所述第一膜沉积于所述内表面上并至少部分地围绕所述外壳部件的边缘延伸到所述外表面上;以及第二膜,所述第二膜沉积于所述外表面上并且至少部分地沉积于所述外表面上的所述第一膜的一部分上,所述第二膜与沉积于所述内表面上的所述第一膜的一部分电连通。 |
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