Fast Gaussian filtering video noise reduction method based on FPGA

The invention discloses a fast Gaussian filtering video noise reduction method based on an FPGA, adopted sub-modules comprise an FPGA processing chip, a photoelectric image detection unit, a DDR3 storage unit, a power supply management module and a key control module, the FPGA processing chip is used for controlling configuration and transmitting a video to the photoelectric image detection unit and the DDR3 storage unit, and the power supply management module is used for controlling the configuration and transmitting the video to the photoelectric image detection unit and the DDR3 storage unit. A key control signal is received from the key control module, and the FPGA processing chip preprocesses video data in real time by adopting fast Gaussian filtering algorithm circuit logic. According to the method, complex multiplication and division are converted into fixed-point number arithmetic displacement operation by utilizing the characteristics of a digital logic circuit, so that the calculation steps are grea