Systems and methods for using CXL test devices to increase parallelism

The invention discloses a system and method for using a CXL test device to increase parallelism. Embodiments of the invention may selectively enable testing of a device by 16 channels (x16) or 8 channels (x8) during testing using a multiplexer circuit disposed between a CXL 1.1 CPU and a DUT. Compared with an existing method in which only eight channels of a CXL 1.1 CPU can be used for testing the device, the method has the advantage that the parallelism and the testing efficiency are remarkably improved. 本申请公开了使用CXL测试器件以增加并行性的系统和方法。本发明的实施例可以在测试期间使用设置在CXL1.1CPU和DUT之间的多路复用器电路选择性地启用16通道(x16)或8通道(x8)对器件的测试。与只能使用CXL 1.1CPU的8通道对器件进行测试的现有方法相比，通过这种方式，并行性和测试效率得到了显著提高。