Microcode patch loading method of processor and processor
The invention provides a microcode patch loading method of a processor, which comprises the following steps that: a processor core sends an interrupt request to a security module, the security module responds to the interrupt request and obtains and authenticates a microcode patch to be loaded, if t...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a microcode patch loading method of a processor, which comprises the following steps that: a processor core sends an interrupt request to a security module, the security module responds to the interrupt request and obtains and authenticates a microcode patch to be loaded, if the authentication is successful, a microcode patch plaintext is obtained from the microcode patch to be loaded, and the microcode patch plaintext is sent to the processor core; encrypting the microcode patch plaintext by using a first random key to obtain a first microcode patch ciphertext, writing the first microcode patch ciphertext into a memory through a memory controller, configuring the first random key to a processor core, and sending an interrupt response message to the processor core; the processor core receives the interrupt response message, if feedback authentication succeeds, the first microcode patch ciphertext is obtained, and the first random key is used for decrypting the first microcode patch ciph |
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