Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof
The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage G...
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| creator | XIE RUBIN LI YANFEI WANG YU HONG GENSHEN |
| description | The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage GGNMOS ESD (Electro-Static Discharge) device without the hysteresis effect. According to the invention, the first N-type doped region is used as a voltage-withstanding region, the doping concentration of the first N-type doped region is low, the breakdown voltage of the device can be improved, and the trigger voltage Vt1 and the maintaining voltage Vh of the device are improved; the injection of the first N-type doped region is located before the thick gate oxide, the first N-type doped region is overlapped with the polycrystalline gate electrode and the thick gate oxide to form a field plate structure, the length of the overlapped part is adjustable, the electric field of the first N-type doped region below is modu |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN117637812A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN117637812A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN117637812A3</originalsourceid><addsrcrecordid>eNqNzLEKwjAURuEuDqK-Q3yADLVgXaVou1gH3cMl-dMEahOSS8G3V9EHcDrLx1kWqntmRkL2WcJaaJY2AYIm9jKR8cQ-TML5wck5jEwDRNv2l-tNGMxef6QRMSFS-tIH2AUj2L2vwa6LhaUxY_PrqtieT_emk4hBIUfSmMCq6cuy3lf1odwdq3_MC2kdPL4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof</title><source>esp@cenet</source><creator>XIE RUBIN ; LI YANFEI ; WANG YU ; HONG GENSHEN</creator><creatorcontrib>XIE RUBIN ; LI YANFEI ; WANG YU ; HONG GENSHEN</creatorcontrib><description>The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage GGNMOS ESD (Electro-Static Discharge) device without the hysteresis effect. According to the invention, the first N-type doped region is used as a voltage-withstanding region, the doping concentration of the first N-type doped region is low, the breakdown voltage of the device can be improved, and the trigger voltage Vt1 and the maintaining voltage Vh of the device are improved; the injection of the first N-type doped region is located before the thick gate oxide, the first N-type doped region is overlapped with the polycrystalline gate electrode and the thick gate oxide to form a field plate structure, the length of the overlapped part is adjustable, the electric field of the first N-type doped region below is modu</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240301&DB=EPODOC&CC=CN&NR=117637812A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240301&DB=EPODOC&CC=CN&NR=117637812A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>XIE RUBIN</creatorcontrib><creatorcontrib>LI YANFEI</creatorcontrib><creatorcontrib>WANG YU</creatorcontrib><creatorcontrib>HONG GENSHEN</creatorcontrib><title>Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof</title><description>The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage GGNMOS ESD (Electro-Static Discharge) device without the hysteresis effect. According to the invention, the first N-type doped region is used as a voltage-withstanding region, the doping concentration of the first N-type doped region is low, the breakdown voltage of the device can be improved, and the trigger voltage Vt1 and the maintaining voltage Vh of the device are improved; the injection of the first N-type doped region is located before the thick gate oxide, the first N-type doped region is overlapped with the polycrystalline gate electrode and the thick gate oxide to form a field plate structure, the length of the overlapped part is adjustable, the electric field of the first N-type doped region below is modu</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNzLEKwjAURuEuDqK-Q3yADLVgXaVou1gH3cMl-dMEahOSS8G3V9EHcDrLx1kWqntmRkL2WcJaaJY2AYIm9jKR8cQ-TML5wck5jEwDRNv2l-tNGMxef6QRMSFS-tIH2AUj2L2vwa6LhaUxY_PrqtieT_emk4hBIUfSmMCq6cuy3lf1odwdq3_MC2kdPL4</recordid><startdate>20240301</startdate><enddate>20240301</enddate><creator>XIE RUBIN</creator><creator>LI YANFEI</creator><creator>WANG YU</creator><creator>HONG GENSHEN</creator><scope>EVB</scope></search><sort><creationdate>20240301</creationdate><title>Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof</title><author>XIE RUBIN ; LI YANFEI ; WANG YU ; HONG GENSHEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117637812A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>XIE RUBIN</creatorcontrib><creatorcontrib>LI YANFEI</creatorcontrib><creatorcontrib>WANG YU</creatorcontrib><creatorcontrib>HONG GENSHEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>XIE RUBIN</au><au>LI YANFEI</au><au>WANG YU</au><au>HONG GENSHEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof</title><date>2024-03-01</date><risdate>2024</risdate><abstract>The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage GGNMOS ESD (Electro-Static Discharge) device without the hysteresis effect. According to the invention, the first N-type doped region is used as a voltage-withstanding region, the doping concentration of the first N-type doped region is low, the breakdown voltage of the device can be improved, and the trigger voltage Vt1 and the maintaining voltage Vh of the device are improved; the injection of the first N-type doped region is located before the thick gate oxide, the first N-type doped region is overlapped with the polycrystalline gate electrode and the thick gate oxide to form a field plate structure, the length of the overlapped part is adjustable, the electric field of the first N-type doped region below is modu</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof |
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