Hysteresis-effect-free anti-radiation high-voltage GGNMOS device and preparation method thereof

The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage G...

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Hauptverfasser: XIE RUBIN, LI YANFEI, WANG YU, HONG GENSHEN
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The invention discloses an anti-radiation high-voltage GGNMOS device without a hysteresis effect and a preparation method thereof, belongs to the field of semiconductors, is suitable for an anti-radiation high-voltage bulk silicon and SOI (Silicon On Insulator) process, and realizes a high-voltage GGNMOS ESD (Electro-Static Discharge) device without the hysteresis effect. According to the invention, the first N-type doped region is used as a voltage-withstanding region, the doping concentration of the first N-type doped region is low, the breakdown voltage of the device can be improved, and the trigger voltage Vt1 and the maintaining voltage Vh of the device are improved; the injection of the first N-type doped region is located before the thick gate oxide, the first N-type doped region is overlapped with the polycrystalline gate electrode and the thick gate oxide to form a field plate structure, the length of the overlapped part is adjustable, the electric field of the first N-type doped region below is modu