Power semiconductor module
The present disclosure relates to a power semiconductor module (1) comprising: at least two groups (2, 3; 31, 32, 33, 34), the semiconductor switches (4) of each group (2, 3; 31, 32, 33, 34) are connected in parallel; a module gate contact (5); a group gate contact (6, 7) for each group; a first bra...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The present disclosure relates to a power semiconductor module (1) comprising: at least two groups (2, 3; 31, 32, 33, 34), the semiconductor switches (4) of each group (2, 3; 31, 32, 33, 34) are connected in parallel; a module gate contact (5); a group gate contact (6, 7) for each group; a first branch point (8) connected to the module gate contact (5) and the group gate contact (6, 7); a gate path between the module gate contact (5) and the first branch point (8), said gate path being for at least one of said at least two groups (2, 3; the semiconductor switches (31, 32, 33, 34) are shared; a compensation structure (9; 9 ') in the connection path between the first branch point (8) and the gate terminals (10) of the semiconductor switches (4) of the at least one group (3); 39) for increasing the inductance of the connection path.
本公开涉及一种功率半导体模块(1),其包括:并联连接的至少两组(2、3;31、32、33、34)的半导体开关(4),每个组的半导体开关(4)在该组(2、3;31、32、33、34)内并联连接;模块栅极接触部(5);用于每个组的组栅极接触部(6、7);第一分支点(8),其连接到模块栅极接触部(5)和组栅极接触部(6、7);模块栅极接触部(5)与第一分支点(8)之间 |
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