Chip surface defect detection method of compressed multi-head self-attention neural network

The invention belongs to the field of defect detection and image processing, and relates to a chip surface defect detection method based on a compressed multi-head self-attention neural network, which comprises the following steps of: photographing and collecting images on the surface of a chip by u...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHU JIE, TIAN XINRU, CAI JUEPING, WEN KAILIN, LI TIANHONG, KONG LIANG, ZHANG CHENGKAI
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHU JIE
TIAN XINRU
CAI JUEPING
WEN KAILIN
LI TIANHONG
KONG LIANG
ZHANG CHENGKAI
description The invention belongs to the field of defect detection and image processing, and relates to a chip surface defect detection method based on a compressed multi-head self-attention neural network, which comprises the following steps of: photographing and collecting images on the surface of a chip by using visible light imaging equipment, marking normal chips and defect chips in each image, and constructing a target detection data set; constructing a convolutional neural network initial model; training the initial model; and inputting a test set image in the constructed data set into a final model of the convolutional neural network based on the compressed multi-head self-attention mechanism to complete chip surface defect detection. According to the invention, the technical problems of poor detection effect and low calculation efficiency of small-size and high-density defect targets in a chip surface image when a chip with surface defects is detected in the prior art are solved. 本发明属于缺陷检测以及图像处理领域,一种压缩多头自注意力神经网络
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN117474863A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN117474863A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN117474863A3</originalsourceid><addsrcrecordid>eNqNzbEKwjAURuEuDqK-w_UBMpQW6ypBcXJycyih-UNDkyYkN_j6BvEBnL7lwNk2LznbSLkkoyaQhsHEFa7YsJIHz0FTMDQFHxNyhiZfHFsxQ2nKcEYoZqzffEVJylX4HdKybzZGuYzDz11zvF2f8i4Qw4gc67GWo3y07dAP_fnUXbp_mg-L3Dve</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Chip surface defect detection method of compressed multi-head self-attention neural network</title><source>esp@cenet</source><creator>CHU JIE ; TIAN XINRU ; CAI JUEPING ; WEN KAILIN ; LI TIANHONG ; KONG LIANG ; ZHANG CHENGKAI</creator><creatorcontrib>CHU JIE ; TIAN XINRU ; CAI JUEPING ; WEN KAILIN ; LI TIANHONG ; KONG LIANG ; ZHANG CHENGKAI</creatorcontrib><description>The invention belongs to the field of defect detection and image processing, and relates to a chip surface defect detection method based on a compressed multi-head self-attention neural network, which comprises the following steps of: photographing and collecting images on the surface of a chip by using visible light imaging equipment, marking normal chips and defect chips in each image, and constructing a target detection data set; constructing a convolutional neural network initial model; training the initial model; and inputting a test set image in the constructed data set into a final model of the convolutional neural network based on the compressed multi-head self-attention mechanism to complete chip surface defect detection. According to the invention, the technical problems of poor detection effect and low calculation efficiency of small-size and high-density defect targets in a chip surface image when a chip with surface defects is detected in the prior art are solved. 本发明属于缺陷检测以及图像处理领域,一种压缩多头自注意力神经网络</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240130&amp;DB=EPODOC&amp;CC=CN&amp;NR=117474863A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240130&amp;DB=EPODOC&amp;CC=CN&amp;NR=117474863A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHU JIE</creatorcontrib><creatorcontrib>TIAN XINRU</creatorcontrib><creatorcontrib>CAI JUEPING</creatorcontrib><creatorcontrib>WEN KAILIN</creatorcontrib><creatorcontrib>LI TIANHONG</creatorcontrib><creatorcontrib>KONG LIANG</creatorcontrib><creatorcontrib>ZHANG CHENGKAI</creatorcontrib><title>Chip surface defect detection method of compressed multi-head self-attention neural network</title><description>The invention belongs to the field of defect detection and image processing, and relates to a chip surface defect detection method based on a compressed multi-head self-attention neural network, which comprises the following steps of: photographing and collecting images on the surface of a chip by using visible light imaging equipment, marking normal chips and defect chips in each image, and constructing a target detection data set; constructing a convolutional neural network initial model; training the initial model; and inputting a test set image in the constructed data set into a final model of the convolutional neural network based on the compressed multi-head self-attention mechanism to complete chip surface defect detection. According to the invention, the technical problems of poor detection effect and low calculation efficiency of small-size and high-density defect targets in a chip surface image when a chip with surface defects is detected in the prior art are solved. 本发明属于缺陷检测以及图像处理领域,一种压缩多头自注意力神经网络</description><subject>CALCULATING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNzbEKwjAURuEuDqK-w_UBMpQW6ypBcXJycyih-UNDkyYkN_j6BvEBnL7lwNk2LznbSLkkoyaQhsHEFa7YsJIHz0FTMDQFHxNyhiZfHFsxQ2nKcEYoZqzffEVJylX4HdKybzZGuYzDz11zvF2f8i4Qw4gc67GWo3y07dAP_fnUXbp_mg-L3Dve</recordid><startdate>20240130</startdate><enddate>20240130</enddate><creator>CHU JIE</creator><creator>TIAN XINRU</creator><creator>CAI JUEPING</creator><creator>WEN KAILIN</creator><creator>LI TIANHONG</creator><creator>KONG LIANG</creator><creator>ZHANG CHENGKAI</creator><scope>EVB</scope></search><sort><creationdate>20240130</creationdate><title>Chip surface defect detection method of compressed multi-head self-attention neural network</title><author>CHU JIE ; TIAN XINRU ; CAI JUEPING ; WEN KAILIN ; LI TIANHONG ; KONG LIANG ; ZHANG CHENGKAI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117474863A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHU JIE</creatorcontrib><creatorcontrib>TIAN XINRU</creatorcontrib><creatorcontrib>CAI JUEPING</creatorcontrib><creatorcontrib>WEN KAILIN</creatorcontrib><creatorcontrib>LI TIANHONG</creatorcontrib><creatorcontrib>KONG LIANG</creatorcontrib><creatorcontrib>ZHANG CHENGKAI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHU JIE</au><au>TIAN XINRU</au><au>CAI JUEPING</au><au>WEN KAILIN</au><au>LI TIANHONG</au><au>KONG LIANG</au><au>ZHANG CHENGKAI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Chip surface defect detection method of compressed multi-head self-attention neural network</title><date>2024-01-30</date><risdate>2024</risdate><abstract>The invention belongs to the field of defect detection and image processing, and relates to a chip surface defect detection method based on a compressed multi-head self-attention neural network, which comprises the following steps of: photographing and collecting images on the surface of a chip by using visible light imaging equipment, marking normal chips and defect chips in each image, and constructing a target detection data set; constructing a convolutional neural network initial model; training the initial model; and inputting a test set image in the constructed data set into a final model of the convolutional neural network based on the compressed multi-head self-attention mechanism to complete chip surface defect detection. According to the invention, the technical problems of poor detection effect and low calculation efficiency of small-size and high-density defect targets in a chip surface image when a chip with surface defects is detected in the prior art are solved. 本发明属于缺陷检测以及图像处理领域,一种压缩多头自注意力神经网络</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN117474863A
source esp@cenet
subjects CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
title Chip surface defect detection method of compressed multi-head self-attention neural network
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T16%3A27%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHU%20JIE&rft.date=2024-01-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN117474863A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true