Signal processing circuit and memory

The embodiment of the invention provides a signal processing circuit and a memory, and the signal processing circuit comprises a command address sampling circuit which is used for carrying out at least two times of sampling processing on an initial command address signal every half external clock period to obtain at least two command address signals, and synchronously outputting the at least two command address signals; the initial command address signal comprises N command address sub-signals, N is smaller than the number M of command address pins of the semiconductor memory, and M is an integral multiple of N. According to the arrangement, when the semiconductor memory enters a circuit probe test mode and the number of command address pins for transmission is halved, the signal processing circuit can correctly sample and decode CA signals at the moment. 本公开实施例提供了一种信号处理电路、存储器，该信号处理电路包括：命令地址采样电路，用于每间隔半个外部时钟周期对初始命令地址信号进行至少两次采样处理，得到至少两个命令地址信号，并将所述至少两个命令地址信号同步输出；所述初始命令地址信号包括N个命令地址子信号，N小于所述半导体存储器的命令地址引脚个数M，M为N的整数