Three-dimensional NAND memory device and manufacturing method

A method of forming a three-dimensional (3D) NAND memory device includes forming a gate line slot through a plurality of alternating layers of oxide layers and conductive material layers, where the conductive material layers are also formed on sidewalls and a bottom of the gate line slot; executing...

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Bibliographische Detailangaben
Hauptverfasser: XUE LEI, HUO ZONGLIANG, XU BO, YAN LONGXIANG, WANG FAZHAN, XU WEI
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:A method of forming a three-dimensional (3D) NAND memory device includes forming a gate line slot through a plurality of alternating layers of oxide layers and conductive material layers, where the conductive material layers are also formed on sidewalls and a bottom of the gate line slot; executing an ion implantation process to at least dope the part of the conductive material layer on the side wall and/or the bottom of the gate line gap; and executing an etching process in the gate line gap to remove the conductive material layer weakened by the ion implantation process. 一种形成三维(3D)NAND存储器件的方法,包括:穿过氧化物层和导电材料层的多个交替层形成栅极线缝隙,其中,导电材料层还形成在栅极线缝隙的侧壁和底部上;执行离子注入工艺以至少对导电材料层的在栅极线缝隙的侧壁的部分和/或底部上的部分进行掺杂;以及在栅极线缝隙中执行蚀刻工艺以去除被离子注入工艺削弱的导电材料层。