High reliability semiconductor package design

The invention discloses a high reliability semiconductor package design. A power semiconductor device package is provided. The package may include a substrate having a plurality of vias. The package may also include an insulating body secured to the top side of the substrate. The insulating body may include a main portion for enclosing a set of semiconductor devices therein and a plurality of locking structures disposed along a lower periphery of the main portion and integrally formed within the insulating body, with the plurality of locking structures extending through the substrate. 本发明公开了高可靠性半导体封装件设计。一种功率半导体器件封装件。该封装件可以包括具有多个通孔的基板。封装件还可以包括被固定到基板的顶侧的绝缘主体。绝缘主体可以包括用于将一组半导体器件包围在其中的主要部分和多个锁定结构，多个锁定结构沿着主要部分的下周边设置，并且一体地形成在绝缘主体内，其中，多个锁定结构延伸穿过基板。