Serial port to bus device, field programmable gate array and debugging method thereof
The invention discloses a serial port-to-bus device, a field programmable gate array (FPGA) and a debugging method thereof. According to the embodiment of the invention, an upper computer sends a debugging instruction including bus reading and writing to the serial port-to-bus device constructed on...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a serial port-to-bus device, a field programmable gate array (FPGA) and a debugging method thereof. According to the embodiment of the invention, an upper computer sends a debugging instruction including bus reading and writing to the serial port-to-bus device constructed on the field programmable gate array (FPGA); the serial port to bus device converts and processes a first bit received through a serial port into bus read-write information, and generates a bus time sequence for operating an FPGA internal register according to the bus read-write information; after the read-write operation is executed on the internal register of the FPGA according to the generated bus time sequence, the bus read-back data obtained by the read operation is fed back to the upper computer through the serial port, under the condition that hardware resources do not need to be additionally occupied and only part of FPGA logic resources are occupied, the number of supportable read-write signals is increased t |
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