Top gate structure indium gallium zinc oxide thin film transistor with threshold voltage controllable by pre-annealing temperature and preparation method of top gate structure indium gallium zinc oxide thin film transistor

The invention relates to a top gate structure indium gallium zinc oxide thin film transistor with threshold voltage controllable by pre-annealing temperature and a preparation method of the top gate structure indium gallium zinc oxide thin film transistor. The top gate structure indium gallium zinc oxide thin film transistor comprises a substrate, a source electrode, a drain electrode, an a-IGZO channel layer, a gate dielectric layer and a gate electrode which are sequentially arranged from bottom to top, and after the a-IGZO channel layer is prepared, pre-annealing treatment is carried out, the pre-annealing atmosphere is air, the humidity is 30-50%, the annealing time is 50-70 min, and the annealing temperature is 200-300 DEG C. According to the thin film transistor disclosed by the invention, the gate dielectric is grown by utilizing the atomic layer deposition technology, so that the interface state of the indium gallium zinc oxide and the gate dielectric is improved, and the sub-threshold swing of the tr