Single packaging body fusing multiple chip packaging
The invention, which relates to the integrated circuit field, discloses a single packaging body integrating multiple chip packaging, comprising a packaging module, a heat dissipation optimization module, an electromagnetic interference isolation module, a simulation verification module, a maintenanc...
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creator | LIAO JUNNAN GU DEZONG FAN GUANGYU |
description | The invention, which relates to the integrated circuit field, discloses a single packaging body integrating multiple chip packaging, comprising a packaging module, a heat dissipation optimization module, an electromagnetic interference isolation module, a simulation verification module, a maintenance upgrading module, a fault maintenance module, a power management module, a debugging optimization module, an electrostatic impedance protection module and a control interface module. Through the heat dissipation optimization module, the heat dissipation effect of the whole packaging body is improved, and the heat dissipation problem of a traditional packaging body is solved; signal interference among different modules is isolated through the electromagnetic interference isolation module; system-level design and verification are carried out through the simulation verification module; different chip modules are independently designed through a modular design method; the maintenance and upgrading module is provided |
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Through the heat dissipation optimization module, the heat dissipation effect of the whole packaging body is improved, and the heat dissipation problem of a traditional packaging body is solved; signal interference among different modules is isolated through the electromagnetic interference isolation module; system-level design and verification are carried out through the simulation verification module; different chip modules are independently designed through a modular design method; the maintenance and upgrading module is provided</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231229&DB=EPODOC&CC=CN&NR=117316894A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231229&DB=EPODOC&CC=CN&NR=117316894A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIAO JUNNAN</creatorcontrib><creatorcontrib>GU DEZONG</creatorcontrib><creatorcontrib>FAN GUANGYU</creatorcontrib><title>Single packaging body fusing multiple chip packaging</title><description>The invention, which relates to the integrated circuit field, discloses a single packaging body integrating multiple chip packaging, comprising a packaging module, a heat dissipation optimization module, an electromagnetic interference isolation module, a simulation verification module, a maintenance upgrading module, a fault maintenance module, a power management module, a debugging optimization module, an electrostatic impedance protection module and a control interface module. Through the heat dissipation optimization module, the heat dissipation effect of the whole packaging body is improved, and the heat dissipation problem of a traditional packaging body is solved; signal interference among different modules is isolated through the electromagnetic interference isolation module; system-level design and verification are carried out through the simulation verification module; different chip modules are independently designed through a modular design method; the maintenance and upgrading module is provided</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAJzsxLz0lVKEhMzk5MB7IVkvJTKhXSSotB7NzSnJLMAqB0ckZmAUINDwNrWmJOcSovlOZmUHRzDXH20E0tyI9PLQaqS81LLYl39jM0NDc2NLOwNHE0JkYNADTvLOE</recordid><startdate>20231229</startdate><enddate>20231229</enddate><creator>LIAO JUNNAN</creator><creator>GU DEZONG</creator><creator>FAN GUANGYU</creator><scope>EVB</scope></search><sort><creationdate>20231229</creationdate><title>Single packaging body fusing multiple chip packaging</title><author>LIAO JUNNAN ; GU DEZONG ; FAN GUANGYU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117316894A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LIAO JUNNAN</creatorcontrib><creatorcontrib>GU DEZONG</creatorcontrib><creatorcontrib>FAN GUANGYU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIAO JUNNAN</au><au>GU DEZONG</au><au>FAN GUANGYU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Single packaging body fusing multiple chip packaging</title><date>2023-12-29</date><risdate>2023</risdate><abstract>The invention, which relates to the integrated circuit field, discloses a single packaging body integrating multiple chip packaging, comprising a packaging module, a heat dissipation optimization module, an electromagnetic interference isolation module, a simulation verification module, a maintenance upgrading module, a fault maintenance module, a power management module, a debugging optimization module, an electrostatic impedance protection module and a control interface module. Through the heat dissipation optimization module, the heat dissipation effect of the whole packaging body is improved, and the heat dissipation problem of a traditional packaging body is solved; signal interference among different modules is isolated through the electromagnetic interference isolation module; system-level design and verification are carried out through the simulation verification module; different chip modules are independently designed through a modular design method; the maintenance and upgrading module is provided</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES |
title | Single packaging body fusing multiple chip packaging |
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