Address hashing in multi-memory controller system
In one embodiment, a system may support programmable hashing of address bits of multiple granularity levels to map memory addresses to a memory controller and ultimately to at least a memory device. The hash may be programmed to distribute memory pages across the memory controllers, and contiguous b...
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Zusammenfassung: | In one embodiment, a system may support programmable hashing of address bits of multiple granularity levels to map memory addresses to a memory controller and ultimately to at least a memory device. The hash may be programmed to distribute memory pages across the memory controllers, and contiguous blocks of pages may be mapped to physically remote memory controllers. In one embodiment, address bits may be discarded from each granularity level to form a compact pipeline address to conserve power within the memory controller. In one embodiment, when complete memory is not needed, a memory folding scheme may be employed to reduce the number of active memory devices and/or memory controllers in the system.
在一个实施方案中,系统可支持多个粒度级别的地址位的可编程散列,以将存储器地址映射到存储器控制器并最终至少映射到存储器设备。散列可被编程为跨存储器控制器分布存储器页面,并且页面的连续块可被映射到物理上远离的存储器控制器。在一个实施方案中,可从每个粒度级别丢弃地址位,从而形成紧凑管道地址,以节省存储器控制器内的功率。在一个实施方案中,当不需要完整的存储器时,可采用存储器折叠方案来减少系统中的有源存储器设备和/或存储器控制器的数量。 |
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