System-on-chip prototype verification system

The invention discloses a prototype verification system of a system-on-chip. A first chipset and a subsystem are arranged in a prototype verification system, the first chipset is provided with a plurality of first field programmable logic gate arrays, and each first field programmable logic gate array runs a first bit stream file to realize all or part of logic functions of one or more core particles of a system on chip. And the subsystems realize extended functions. Therefore, the prototype verification system of the system-on-chip is constructed through the first field programmable logic gate array, and prototype verification of the system-on-chip is achieved. 公开了一种晶上系统的原型验证系统。通过在原型验证系统中设置第一芯片组和子系统，第一芯片组设置多个第一现场可编程逻辑门阵列，每个第一现场可编程逻辑门阵列通过运行第一位流文件以实现晶上系统的一个或多个芯粒的全部或部分逻辑功能，子系统实现扩展功能。由此，通过第一现场可编程逻辑门阵列构建晶上系统的原型验证系统，实现对晶上系统的原型验证。