Digital integrated circuit optimization method, equipment and medium

The invention discloses a digital integrated circuit optimization method and device and a medium, which are characterized in that on the premise of meeting certain time sequence constraints, gate unit characteristics of a circuit are extracted, a leakage power consumption optimization model is const...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WANG JIAHAO, ZHANG ZHANHUA, CAO PENG
Format: Patent
Sprache:chi ; eng
Schlagworte:
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