Digital integrated circuit optimization method, equipment and medium

The invention discloses a digital integrated circuit optimization method and device and a medium, which are characterized in that on the premise of meeting certain time sequence constraints, gate unit characteristics of a circuit are extracted, a leakage power consumption optimization model is constructed by adopting a graph neural network and a reinforcement learning method, and under the guidance of a reward function, leakage power consumption and time sequence changes are considered, so that a leakage power consumption optimization model is established; and the threshold voltage of the gate unit is distributed, so that the circuit is optimized, and the optimization target of reducing leakage power consumption is achieved. Compared with a commercial circuit optimization tool, the digital integrated circuit optimization method provided by the invention can be applied to circuit optimization in an engineering modification (ECO) stage, a better leakage power consumption optimization effect can be obtained unde