Integrated circuit, data storage method and error correction data obtaining method

The invention provides an integrated circuit, a data storage method and a method for obtaining error correction data. The integrated circuit includes a memory array; an address register storing at least one address of the securely stored file and configured to output three or more addresses of the securely stored file; and an in-memory compute CIM logic coupled to the memory array. The CIM logic is configured to perform a majority decision function on three or more bits of a securely stored archive, where the three or more bits are redundantly stored in three or more different locations in the memory array, and where the three locations are associated with three or more addresses in the memory array. 本发明提供了一种集成电路、数据储存方法及获得错误校正数据的方法，该集成电路包含：存储器阵列；地址暂存器，保存安全储存的档案的至少一个地址，且经组态以输出安全储存的档案的三个或大于三个地址；以及存储器内计算CIM逻辑，与存储器阵列耦接。CIM逻辑经组态以对安全储存的档案的三个或大于三个位执行多数决功能，其中三个或大于三个位冗余地储存于存储器阵列中的三个或大于三个不同位置中，且其中所述三个位置与存储器阵列中的三个或大于三个地址相关联。