Dynamic D trigger layout structure, manufacturing method thereof and chip

The invention discloses a dynamic D trigger layout structure, a manufacturing method thereof and a chip. The dynamic D trigger layout structure comprises a trigger unit layout structure; wherein the boundary of the trigger unit layout structure, except for a preset boundary area, is provided with a grid cut-off opening, and the grid cut-off opening is filled with a stress material; the preset boundary region comprises a boundary region where at least one PMOS transistor grid pattern is located. By adopting the scheme, the function failure probability of the dynamic D trigger can be reduced, and the function of the dynamic D trigger can be improved. 一种动态D触发器版图结构及其制作方法、芯片。所述动态D触发器版图结构包括：触发器单元版图结构；其中，所述触发器单元版图结构的边界上，除预设边界区域外的其它边界区域上，具有栅极切断开口，所述栅极切断开口内填充有应力材料；所述预设边界区域包括：至少一个PMOS管栅极图形所在的边界区域。采用上述方案，可以降低动态D触发器功能失效的概率，提升降低动态D触发器的功能。