High-speed IO branch data gateway system based on trusted measurement and design method thereof
The invention relates to a trusted measurement-based high-speed IO branch data gateway system and a design method thereof, the system comprises a DPU mother board and a DPU daughter board, the DPU mother board is provided with a trusted platform module, a processor module and an FPGA module, the DPU...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a trusted measurement-based high-speed IO branch data gateway system and a design method thereof, the system comprises a DPU mother board and a DPU daughter board, the DPU mother board is provided with a trusted platform module, a processor module and an FPGA module, the DPU daughter board is provided with a plurality of IO branches, each IO branch is provided with a plurality of IO modules, and the FPGA module is connected with each IO module through an inter-board connector; trusted measurement is completed between the trusted platform module and the processor module, when trusted verification is correct, the processor module sends a trusted initialization mark to the FPGA module, and the FPGA module performs data interaction with each IO module after receiving the trusted initialization mark. The data transceiving process between the FPGA module and each IO module of each IO branch is subjected to three-stage RAM data caching and one-stage FIFO data caching, and each stage of data |
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