Digital transmitter with 50-LO signed phase mapper

A digitally controlled segmented RF power transmitter has a digital processing section (2) and an RF power amplification section (3) having a plurality of segments (122). The digital processing section (2) has: a clock generation block (5) arranged to generate n equal-phase clock signals (fLO, x50%; cx); and a sign bit phase mapper unit (11) arranged to receive n equal-phase clock signals (fLO, x50%; cx) and a symbol signal (SignI, SignQ; 2), and outputting m phase-mapped clock signals (CLKy, 50%; 2) having a 50% duty cycle using a predetermined phase-switching scheme, and outputting m phase-mapped clock signals (CLKy, 50%; cy), m < = n. Each of the plurality of segments (122) includes a logic circuit (12) that receives m phase-mapped clock signals (CLKy, 50%; cy) and arranged to provide respective segment drive signals having a duty cycle z of less than 50%. 数字控制分段RF功率发射器具有数字处理部分(2)和RF功率放大部分(3)，该RF功率放大部分(3)具有多个段(122)。数字处理部分(2)具有：时钟生成块(5)，被布置为生成具有50％占空比的n个等相时钟信号(fLO,x_50％；Cx)；以及符号位相位映射器单元(11)，被布置为接收n个等相时钟信号(f