Method for improving morphology of interlayer dielectric layer

Methods for improving inter-layer dielectric (ILD) layer topography and resulting integrated circuit devices are disclosed herein. An exemplary method includes forming a first contact etch stop layer having a first thickness over a first region of a wafer, forming a second contact etch stop layer having a second thickness over a second region of the wafer, and forming an ILD layer over the first contact etch stop layer and the second contact etch stop layer. There is a first topographic change between the first region and the second region. The second thickness is different from the first thickness to achieve a second topography change that is less than the first topography change. The first topography change may be caused by a height difference between a first gate structure disposed over the wafer in the first region and a second gate structure disposed over the wafer in the second region. The embodiment of the invention also relates to a method for improving the morphology of the interlayer dielectric laye