Lock state monitoring circuit, electronic lock and lock state monitoring and control method

The lock state monitoring circuit comprises a main control chip, a wiring terminal, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, wherein the wiring terminal comprises a first pin, a second pin, a third pin, a fourth pin, a fifth pin and a sixth pin; the first resistor, the second resistor, the third resistor and the fourth resistor are connected in sequence and grounded; the fifth resistor is connected with a first power supply; the first pin, the second pin and the third pin are respectively connected to one grounded end of the first resistor, the joint of the first resistor and the second resistor and the joint of the second resistor and the third resistor, and the fourth pin and the fifth pin are both connected to the joint of the third resistor and the fourth resistor. An ADC pin and a sixth pin of the main control chip are connected to the joint of the fourth resistor and the fifth resistor; the resistance values of the second resistor and the fourth resi