Memory chip, preparation method of through hole structure, memory and electronic equipment
The embodiment of the invention provides a memory chip, a preparation method of a through hole structure, a memory and electronic equipment. The memory chip comprises a stacked structure, and each layer in the stacked structure comprises one or more memory areas and one or more target redundant area...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The embodiment of the invention provides a memory chip, a preparation method of a through hole structure, a memory and electronic equipment. The memory chip comprises a stacked structure, and each layer in the stacked structure comprises one or more memory areas and one or more target redundant areas; wherein each storage area in the one or more storage areas comprises a plurality of storage units, each target redundant area in the one or more target redundant areas comprises one or more groove body structures penetrating through the stacked structure, and each groove body structure comprises an outer-layer insulator structure and an inner-layer through hole structure; the through hole structure is used for forming a power supply layout wiring structure of the memory chip. According to the scheme of the invention, the through hole structures are arranged in the target redundant regions, and the distribution of the target redundant regions on the chip is relatively gathered, so that the wiring length between t |
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