Semiconductor device interface state test structure and test method thereof
The invention discloses a semiconductor device interface state test structure and a test method thereof. According to the invention, two MOS tubes of the same type are arranged, one MOS tube is provided with a plasma absorption structure so as to introduce the plasma generated in the device due to t...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a semiconductor device interface state test structure and a test method thereof. According to the invention, two MOS tubes of the same type are arranged, one MOS tube is provided with a plasma absorption structure so as to introduce the plasma generated in the device due to the process into a substrate, and the other MOS tube is independently connected to a circuit and contains the plasma generated in the process, so that the peak values of the current measured by the two MOS tubes are different, and the peak values of the current measured by the two MOS tubes are different from the peak values of the current measured by the two MOS tubes. According to the peak value difference of the two currents, the damage amount of the plasma to the MOS tube can be tested, and the technology with the large plasma amount can be found in time. And the plasma content of the process is reduced by improving the process, so that the reliability of the device is improved.
本发明公开了一种半导体器件界面态测试结构及其测试方法。本发明通过设 |
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