Hybrid loop expansion decision feedback equalizer architecture

The invention relates to a hybrid loop expansion decision feedback equalizer architecture. A holder device is used in a hybrid loop unwrapping (DFE) circuit for selectively outputting a signal from an equalizer corresponding to a particular likelihood of a value of a previous bit (e.g., logically hi...

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Hauptverfasser: YUN WON-JOO, TAYLOR JENNIFER E
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The invention relates to a hybrid loop expansion decision feedback equalizer architecture. A holder device is used in a hybrid loop unwrapping (DFE) circuit for selectively outputting a signal from an equalizer corresponding to a particular likelihood of a value of a previous bit (e.g., logically high or logically low) when a DFE technique is not used. Those equalizers corresponding to possibilities other than the particular likelihood of the value of the previous bit are deactivated in the hybrid loop unwrapping (DFE) circuit. Thus, the hybrid cycle unfold DFE circuit saves power when the DFE technique is not used, since only a portion of all equalizers in the hybrid cycle unfold DFE circuit is powered. 本公开涉及混合循环展开决策反馈均衡器架构。保持器装置在混合循环展开DFE电路中用于在未使用DFE技术时从对应于先前位(例如逻辑高或逻辑低)的值的特定可能性的均衡器选择性输出信号。对应于除所述先前位的所述值的所述特定可能性之外的可能性的那些均衡器在所述混合循环展开DFE电路中停用。因而,所述混合循环展开DFE电路在未使用所述DFE技术时节省功率,因为所述混合循环展开DFE电路中全部均衡器的仅一部分被供电。