Compiling and linking method and device for SW architecture TLSGD relocation and storage medium

The invention discloses a compiling and linking method and device for SW architecture TLSGD relocation and a storage medium. The compiling and linking method comprises the steps that whether the number of relocation variables exceeds a preset threshold value or not is judged; codes of the thread loc...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ZHANG HAIJUN, ZHAI YANHE, ZHAO AINAN, QIAN MINGLOU, BI QIANXIANG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention discloses a compiling and linking method and device for SW architecture TLSGD relocation and a storage medium. The compiling and linking method comprises the steps that whether the number of relocation variables exceeds a preset threshold value or not is judged; codes of the thread local variables are converted into TLSGD instructions or composite instructions; the TLSGD instruction or the composite instruction obtained through conversion is assembled to a relocation table; performing position adjustment on instruction entries in the relocation table; calculating the offset disp of a thread local variable address corresponding to the TLSGD instruction in the GOT relative to the GP according to the TLSGD instruction entry in the relocation table after the judgment is completed; and determining the offset of the TLSGD instruction or the composite instruction according to whether the offset disp is in the 16-bit binary representation range, and performing backfilling to obtain a repositioned instru