Serial EEPROM verification system and verification method
The invention discloses a verification system and a verification method for a serial EEPROM (Electrically Erasable Programmable Read-Only Memory). The verification method comprises the following steps: presetting an upper computer flow control program by analyzing an application scene and device cha...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a verification system and a verification method for a serial EEPROM (Electrically Erasable Programmable Read-Only Memory). The verification method comprises the following steps: presetting an upper computer flow control program by analyzing an application scene and device characteristics of a to-be-tested device; the assembly adaptability of the to-be-tested device is verified through an electric assembly test; transmitting the output information of the to-be-tested device in the main control area to the to-be-tested device in the to-be-tested area; verifying functional performance test integrity of a write-in read-out function and a power supply voltage range of the device to be tested; performing device environment adaptability verification on the assembled main control area and the area to be tested; the verification data and the conclusion are analyzed, and the maturity grade and the availability grade of the device to be tested are obtained; according to the method, the board-leve |
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