Verification method and device of input and output subsystem, electronic equipment and medium

The invention discloses an IO subsystem verification method and device, electronic equipment and a medium. The method comprises the steps of obtaining a to-be-tested IO subsystem; respectively realizing module interconnection of the two same IO subsystems to be tested among the same hierarchy modules to obtain a combined test system under a plurality of module interconnection types; connecting two input and output ports of each combined test system with a first VIP component and a second VIP component in a verification environment in an adaptive manner; and testing the combined test system under different module interconnection types by using the first VIP component and the second VIP component. According to the technical scheme, layering and symmetry characteristics of a high-speed IO subsystem framework are fully utilized, module-level and system-level parallel testing of the to-be-tested IO system can be efficiently achieved by multiplexing commercial VIPs on the market, the convergence time of chip verifi